The invention relates to delta sigma converters, particularly to those useful in analog-to-digital converters, and more particularly to such delta sigma modulators which have programmable gain.
By way of background, delta sigma modulators are commonly used in analog-to-digital converters. A delta sigma modulator for use in analog-to-digital converters is described in U.S. Pat. No. 5,134,401 (McCartney et al.) entitled "DELTA SIGMA MODULATOR HAVING PROGRAMMABLE GAIN/ATTENUATION", issued Jul. 28, 1992 and incorporated herein by reference. The McCartney et al. patent is the closest prior art presently known to the inventors. It discloses a delta sigma modulator in which the gain is programmable by selectively controlling the rate of sampling of an analog input V.sub.IN relative to the rate of sampling a feedback reference V.sub.REF. U.S. Pat. No. 4,588,981 (Senn), which is discussed at length in the McCartney et al. patent, discloses an analog-to-digital converter using a delta sigma modulator.
FIG. 3 of the McCartney et al. patent is included herein as FIG. 4, labeled "PRIOR ART". In the device shown in prior art FIG. 4, the digital output 111 of buffer 110 of a delta sigma modulator 81 is a digital representation of the analog input signal V.sub.IN. The "gain" of the delta sigma modulator 81 can be thought of as the ratio between the filtered value of an output signal on conductor 111 and the value of the analog input voltage V.sub.IN. The gain also can be thought of as the ratio of the amount of charge transferred from the input sampling capacitor C.sub.IN to integration capacitor C13 during a comparator decision cycle to the amount of charge transferred from the feedback reference capacitor C.sub.REF to integration capacitor C13 during the comparator decision cycle.
The gain is increased for the prior art delta sigma modulator 81 shown in prior art FIG. 4 by increasing the amount of charge transferred onto integrating capacitor C13 as a result of sampling V.sub.IN onto capacitor C.sub.IN relative to the amount of charge transferred onto integrating capacitor C.sub.13 as a result of sampling a reference voltage V.sub.REF onto sampling capacitor C.sub.REF.
Increasing the "gain" of the delta sigma modulator can be understood by recognizing that the output buffer can contain a "maximum" number, which can be thought of as a "full scale" value. It is desirable to be able to convert a first range of relatively small values of V.sub.IN to corresponding digital numbers which represent the value of V.sub.IN. The largest such digital number, which is the "full scale" value of the output buffer 110, should represent the maximum value of V.sub.IN in the first range. It also is desirable to be able to convert a second range (and additional ranges) of relatively larger values of V.sub.IN to corresponding digital numbers. The largest digital number of each range is the same "full scale" value of the output buffer and corresponds to the maximum value of V.sub.IN for that range. Therefore, in order to obtain the desirable correspondence between various maximum values of V.sub.IN (for various ranges) and the same full scale digital number of output buffer 110, it is necessary to be able to adjust the "gain" of delta sigma modulator 81 so that the largest expected value of V.sub.IN corresponds to the full scale digital value of output buffer 110.
The gain of the prior art delta sigma modulator 81 shown in prior art FIG. 4 is adjusted by sampling V.sub.IN onto sampling capacitor C.sub.IN and then transferring its charge onto integrating capacitor C13 at a different rate than the rate of sampling V.sub.REF onto sampling capacitor C.sub.REF and transferring its charge onto integrating capacitor C13.
The delta sigma modulator 81 shown in prior art FIG. 4 includes a programmable control unit 112 which can be controlled by the user to set the gain of the delta sigma modulator 81. This is accomplished by setting the ratio of the sampling rate of the analog input V.sub.IN relative to the sampling rate of the reference voltage V.sub.REF. The McCartney et al. patent explains that changing the gain of the delta sigma modulator of the above mentioned Senn patent is inconvenient because it requires exchanging sampling capacitors. To avoid that shortcoming, McCartney et al. adjust the gain of the delta sigma modulator by adjusting the ratio of the rate at which the analog input V.sub.IN is sampled onto the integrating capacitor C13 relative to the rate at which the reference voltage V.sub.REF is sampled onto integration capacitor C13.